Integrated circuits (IC) are fabricated on semiconductor wafers. Each die on the wafer is tested and validated prior to dicing and packaging. A typical production test involves electrical testing using a wafer prober docked to an electronic test system (tester).
A probe card comprises a set of contacts or probes on a printed circuit board and is an interface between an electronic test system and a semiconductor wafer. In a wafer prober, the probe card is inserted and held in place. During testing, the wafer is loaded into the wafer prober, vacuum mounted on a wafer chuck and manipulated so that there can be a precise electrical contact between the probe card and the wafer. After a die has been electrically tested the wafer prober moves the next die on the wafer to the probe card and the next test can start.
A wafer test can separate the electrically functional dies from the non-functional. From the failed test patterns, it is possible to identify the functional blocks on the die that fails, but localization of the defect may not be possible. In order to find the cause of the failure and to increase wafer yield, further testing using defect isolation tools and techniques is required.
Defects can be classified as static or dynamic. In static defects, the die can easily be biased into a state where the defect can be measured i.e. short and open circuits, output stuck high or low. Dynamic defects cause otherwise functional dies to fail only at a particular frequency or temperature threshold or sequence of test vectors and loops. Dynamic defects require a tester to recreate. This requires the tester to be docked to a defect isolation tool with wafer probing capability.
In such a defect isolation tool, a scope transport can be located at the back side (i.e.: substrate side) of the wafer and is used to move a microscope to a location of interest on a die under test. Microscopes are used for imaging, and/or delivery of optical stimulus in order to locate defects through the back side of a die.
A wafer stage is used to hold the wafer in place during electrical testing by the wafer prober and image capturing by the microscope.
FIG. 1 is a top plan view of a typical semiconductor wafer stage 100, comprising a platform 102 with a cavity 106 and a supporting rim 104. The rim 104 is disposed along the circumference of the cavity 106. A wafer (not shown) can be placed within the cavity 106 and is supported along its circumference by the rim 104. However, the force that a wafer probe exerts onto the wafer can cause the wafer to deform and bend downwards, particularly around the centre where there is a lack of structural support from the rim 104. The deformation can hinder testing by preventing a good electrical contact from forming between the contacts of a probe card and the wafer.
FIG. 2 is a top plan view of another typical wafer stage 200, comprising a platform 202 with a cavity 206, a supporting rim 204 and a network of a plurality of fixed support bars 208. The rim 204 is disposed along the circumference of the cavity 206. The wafer is placed within the cavity 206, above the plurality of fixed support bars 208, and is supported by the fixed support bars 208 and along its circumference by the rim 204. Compared to the wafer stage 100, wafer stage 200 can minimize deformation of the wafer during electrical testing by a wafer probe as it has additional support structures. However, the presence of the support bars 208 on the back side of the wafer means that a location of interest at the back side of the wafer may be obstructed.
FIG. 3 is a top plan view of another typical wafer stage 300, comprising a platform 302, a supporting rim 304 and a transparent plane parallel plate 306. The transparent plate 306 can be made of a material like glass and can be disposed within the supporting rim 304. The wafer is placed on the plate 306 and is supported by the supporting rim 304 and surface 306. Compared to the wafer stage 200, wafer stage 300 further reduces deformation of the wafer during electrical testing by a wafer probe as the entire back side of the wafer is supported by the plate 306. In addition, the entire back side of the wafer can be observed without obstruction from the plurality of support bars (compare FIG. 2). However, the presence of the transparent plane parallel plate 306 induces optical aberrations and results in microscope images that are aberration limited.
A need therefore exists to provide a wafer stage that seeks to address at least one of the abovementioned problems.